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CO527 Anonymous Questions and Answers Keyword Index
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Keyword reference for multiprocessor
Submission reference: IN2020
Hi, I've been going through past papers & lecture slides and I have a few questions
about multi-core/processor machines.
- Would I be right in saying that since from the diagram on the slides
Pentium processors appear to share their L2 cache, RAM accesses aren't
cached local to a core so processes gain no performance from being
scheduled to the same core as much as possible, or am I wrong in thinking
that the cache is shared — perhaps it is the bus to the cache that is
shared, with the cache divided up into sections for each core, just not
stored on each core?
- Similarly the slides say that AMD processors have to worry about page
frame allocation more than Intel ones due to them having a non-uniform
memory architecture. This seems to indicate that cores in AMD processors
have fast, local RAM that only they can access — is this just the on core
L2 cache? I always thought that the cache just, well, cached memory writes
/ accesses, so using some kind of virtual memory system for the cache seems
a little odd, unless it just tries to maintain a local duplicate of
relevant page frames in RAM? I'm probably fundamentally misunderstanding
something here...
Thanks!
Answer 16:
- A multicore package will probably share the L2 cache, but each core still has its own L1 cache.
Of course, you might not be using a multicore machine (and just using regular multiprocessor), in which case there's L1 and L2 caches per core. As far as cache-affine scheduling in multi-processor multicore machines goes, it's probably wise to try and schedule the process on the same group of cores.
- Whilst AMD (and now QPI based Intel machines as I mentioned in the lectures) have local and non-local RAM, any core can access any memory; it's just that non-local RAM costs more (in time) to access. From the diagram in lecture 5, non-local memory reads/writes come in over the hyper-transport bus (or QPI on modern Intels) and get routed to the memory, rather than up to the processor/core.
Keywords:
multiprocessor
Maintained by Fred Barnes, last modified Sun May 17 14:57:41 2015
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