XML CO527 Anonymous Questions and Answers

This page lists the various questions and answers. To submit a question, use the anonymous questions page. You may find the keyword index and/or top-level index useful for locating past questions and answers.

We have taken the liberty of making some minor typographical corrections to some of the questions as originally put. Although most of the questions here will have been submitted anonymously, this page also serves to answer some questions of general interest to those on the course.

Question 21:

Submission reference: IN1437

Can you make the other slides (on paging and the application environment) available please?

Answer 21:

Certainly, here are the slides (PDF) for: lecture 2, lecture 3 and lecture 6.

Keywords: revision-session , exam

Question 22:

Submission reference: IN1438

How can I access the recording you made on the revision lecture?

Answer 22:

I've put it on the lecture schedule page (somewhere near the bottom).

Keywords: revision-session

Question 23:

Submission reference: IN1444

Hi, is program-memory memory in RAM where executable code has been loaded into from hard disk? And data memory is part of RAM that is set aside to store variables used by a program? Thanks.

Answer 23:

Pretty much, but more virtual-memory rather than RAM. Remember that programs (typically) operate within a virtual-machine, with their own virtual-memory. The paging mechanisms imply that this virtual-memory may or may not be in RAM. Above that, the virtual-memory used by a program will typically be divided into various areas: code (read-only and executable), constant data (read-only), the heap (read/write) and the stack (read/write). At the programming language level, variables would typically be allocated in either the stack (local variables), or the heap (dynamically allocated things such as objects).

Keywords: virtual-memory

Question 24:

Submission reference: IN1445

Hi, I can't find the answer to one of the past paper questions in the lecture slides, or in my head. I'm looking for four conditions necessary for resource deadlock. Could you please possibly direct me to the correct lecture or give me some kind of clue as to what these conditions might be? Thanks!

Answer 24:

See Question 17 (2007) — this was not taught this year.

Question 25:

Submission reference: IN1443

I was wondering exactly how the branch if not equal works, if RS and RT are not equal when subtracted by the ALU the Zero Flag in the ALU will low. So how does this result effect multiplexor D? If it doesn’t what happens next? how is the shifted offset added to the PC + 4? Thanks

Answer 25:

Essentially, multiplexor D controls whether the next PC is PC+4 or PC+4+offset (which are the data paths into the multiplexor). The multiplexor is controlled by the result of an AND gate combining "branch" and "zero" signals. For branch if not-equal, the ALU will be told to invert the signal going onto its "zero" line, so that it becomes NOT ((RS - RT) = 0). The ALU control unit will decide this and instruct the ALU accordingly.

Keywords: architecture

Question 26:

Submission reference: IN1447

Hi, What happens when a cache flushes all its memory. Does it just disappear? or does it save back to memory? Thanks

Answer 26:

When a cache is flushed its contents are saved back to memory. In practice, caches may be smart enough to tell when their contents have been modified (and thus saving back to memory can be avoided for cache contents that haven't changed).

Keywords: cache , architecture

Question 27:

Submission reference: IN1449

In the architecture lecture 2 slides, at the base of the diagram for the Register File is "we" (on slide 8). Please can you explain what this is and what it does? Thanks!

Answer 27:

This is the "Write Enable" signal. As per slide 10, the rising edge of this signal causes the specified data ('writedata') to be written to the specified register ('writereg').

Keywords: architecture

Question 28:

Submission reference: IN1446

ok been through the past papers... everything is ok for me except for these questions.. Performance Transparency Failure Transparency Migration Transparency Also when saying that CIFS is connection based is it ok to say that it is because of the fact it retains info about clients connection, open files and file locks???? Thank

Answer 28:

These terms were not used nearly as much this year, as the material was reduced to one lecture.

What they mean is that the relevant attribute (if transparent) should appear the same whether the file system is networked, or not. So, for example, performance transparency means that it goes at pretty much the same speed whether a local file or a networked file. Similar for the others.

Question 29:

Submission reference: IN1448

On the subject of Opportunistic Locks (oplocks). If two or more clients are granted level 2 oplocks but one wants to modify the file, is this allowed? But if a second client wants to modify the file as well then they are all denied and then reallocated a level 2 oplock again? Or can no clients modify a file whilst in level 2 oplock? Hope this makes sense.

Answer 29:

More complicated than you need to know!

Anyway....if a client wants to modify a file and it holds a level II oplock, it must tell the server. If it's the only client using the file, it'll get an exclusive oplock. If other clients hold level II oplocks, the server breaks all of them, forcing all clients to cache nothing at all. In other words, the access can go ahead but no caching is allowed. The client can modify the file but cannot cache the writes.

See the very last slide in that lecture.