CO527 Anonymous Questions and Answers Keyword Index |
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Keyword reference for assembly
2014 |
Submission reference: IN3754
So, can I just check I'm understanding this right, in "brne 0b", the "0b" part of this means branch to "L0:" backwards? If it were "0f" it would try to branch forwards? And if it were "2b" it would try to branch to "L2:" backwards?
Yes. Though I wouldn't expect you to remember details like that for exam purposes (if that was pertinent to an exam question, it'd be said in comments or text).
Keywords: assembly
2013 |
Submission reference: IN2992
In assembler if you have:
ld r16, Y
What does this do? Because the "Y" value is 16-bits long and r16 is only 8?
"Y" is not a value as such, it's an address. I.e. the 8-bits of data at that 16-bit address in SRAM (or potentially other addressable things — see memory-map) are loaded into r16.
Keywords: assembly
Submission reference: IN2906
In the up_counter assembly code example what do these two lines of code do?
ld r24, Y+0 ld r25, Y+1
These are examples of load indirect with displacement. The first loads the 8-bit word at the 16-bit SRAM address pointed to by Y+0 (i.e. Y) into register r24; the second similarly for the 16-bit SRAM address pointed to by Y+1 (i.e. the next byte) into register r25. The range of displacements and what can be used as the base 16-bit address (e.g. "Y") are limited, but enough to be useful (in cases like this).
Submission reference: IN2904
I was looking at the variable brightness LED assembly code, you first of all have both the brightness and the accumulator value are set to 0, so when this first goes round 255*255 times will the LED ever turn on because it will never overflow?
Correct — it is completely "off" in this case.
Submission reference: IN2688
what does the instruction "in r16, SREG" do?
Generally, the "in" instruction read an 8-bit I/O register (or I/O port) and stores it in a general purpose register (r0..r31). In this case, the instruction is reading the status register (SREG), which holds the condition codes and other flags, and stores it in r16. This sort of code would typically be in an interrupt handler, where the state of SREG is essentially unknown and therefore must be saved before the interrupt handler potentially trashes it.
Keywords: assembly
Submission reference: IN2670
Hello, could someone explain how to solve the assembler fragment questions? E.g.:
ldi r16, 0x04 ldi r17, 0x03 mul r16, r17 add r16, r0
what is the value of r16 after execution?
I explained this in one of the week 16 lectures, but basically you first need to find out what each instruction is doing. The slides or the AVR instruction set reference will be useful for this. The first two instructions in this instance are straightforward: load immediate values into r16 and r17, with r16=4 and r17=3. Then multiply — if you look at the docs, you'll see the result of this is 16-bit and placed in r1:r0. Clearly, 3*4=12, so after the multiply r1=0 and r0=12. The last instruction adds r0 (value 12) to r16 (value still 4), so the result is 16 in this instance (or 0x10 in hexadecimal).
Keywords: assembly
Submission reference: IN2674
With the rotate left through carry operation, is the least significant bit used for the carry?
No, the most significant bit. The bits are shifted left, with the existing carry bit put in the least significant (rightmost) bit of the register, and the most significant (leftmost) bit becomes the new carry bit. Observation: if you do this 9 times on the same register, you'll get back to where you started (and similarly with the rotate right through carry instruction).
Keywords: assembly
Submission reference: IN2664
In the up_counter why do you lsl r16? why do you need to shift it left one place (multiply it by 2)?
It's because the counters are 16-bit values, not 8-bit ones. Partly answering Question 9 (2013), from the code, we have:
.data TempData: .space 10*2 ; 20 bytes for 10 16-bit counters
If one could peer at the AVR's SRAM, it would be laid out something like this:
--+----+----+----+----+----+----+----+----+----+-- | aa | bb | cc | dd | ee | ff | aa | bb | cc | ... --+----+----+----+----+----+----+----+----+----+-- ^ +1 +2 +3 +4 +5 +6 +7 +8 +9 ... (up to +19 for TempData) `-- TempData starts here
The first counter value (counter 0) starts at TempData+0, and has the value 0xaabb (16-bit == 2 bytes). The second counter (counter 1) starts at TempData+2 and has the value 0xccdd, and so on. Thus, to get from a counter value (0-9) to its address in SRAM, you need to multiply by 2 — or shift-left one. A few slides on from that has an alternative version of the code.
Keywords: assembly
Submission reference: IN2663
In lecture 7 what does the up_counter assembly code actually do?
It increments one of the counter values. I'll explain a bit more fully in the answer to the next anon question.
Keywords: assembly
Referrers: Question 10 (2013)
Maintained by Fred Barnes, last modified Wed May 25 15:07:20 2016 |