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CO527 Anonymous Questions and Answers Keyword Index |
This page provides a keyword index to questions and answers. Clicking on a keyword will take you to a page containing all questions and answers for that keyword, grouped by year.
To submit a question, use the anonymous questions page. You may find the keyword index and/or top-level index useful for locating past questions and answers.
Keyword reference for avr
2014 |
Submission reference: IN3752
How do we have 16-bit values flying around the diagram of our processor near the program counter when it's just an 8-bit machine? Is it just that those particular address buses are wide enough to allow it, or are we using the value held in 2 8-bit registers?
This is explained in one of the OS lectures probably: the "8-bit"-ness of the machine (word size) refers to the natural size of computations in the device. But that doesn't preclude different bits of the architecture having more (or less) bits. The program memory is a 16-bit space (actually more on some devices) so the address busses involved here are suitably sized. The fact that the instructions come out of the program memory in 16-bit pieces is co-incidence (mostly). Because the registers are only 8-bits wide, when manufacturing a complete address in the program, you'll need to pair up 2 8-bit registers (which is kinda what the X, Y and Z register pairs are for).
As a fairly crude contrast, something like the Intel Pentium (old now), was a 32-bit processor, but had a 36-bit (physical) address space, 32-bit (virtual) address space, and the instructions in memory vary in size between 1 byte and 7 bytes (give or take).
Keywords: avr , architecture
Submission reference: IN3751
For the ATMega328, if the data address space 16 bits, that means there are 65536 addressable locations within it, each of which is 8 bits in size. So overall there is about 64kb of SRAM. I'm getting a bit confused. Am I right in saying that the data address space is only 16 bits when there is 64kb of SRAM, and if there was, say, 2kb of SRAM, the address space is just 11 bits?
There are two aspects here which you're confusing slightly. The first is the size of the address space, and as you point out, a 16-bit address space can address exactly 64 KiB (216) addresses. The second aspect is how much memory (SRAM) there actually is. So on something like the ATMega328, the address space is 16-bit, but only 2 KiB of it is actually occupied (attempts to access things in the remaining 62 KiB won't result in any sort of error, probably either garbage [random] data or mapped onto the 2 KiB SRAM repeatedly, which I think the AVR actually does, but check the datasheet if you want to be sure!).
Because the ATMega328 only has 2 KiB SRAM, you'd only need 11 bits of address space for practical purposes. If you look in the datasheet, some address-specific I/O registers only actually have enough bits as needed (e.g. the stack-pointer is 11 bits on the ATMega328, more on the ATMega2560 for instance).
Keywords: avr , architecture
Submission reference: IN3442
This might be a silly question, but if SRAM is only accessible in 8-bit chunks but has a 16-bit address space, how do you access an address beyond 2^8?
The relation here is that SRAM is 16-bit (addresses) times 8-bits (=1 byte, each addressable unit). So, although the address you read-from or write-to is given as a 16-bit value (0x0000 through 0x08ff on the ATMega328) what data is read or written is only 8-bits.
2013 |
Submission reference: IN2927
Does the character echo program only echo one character a each poll, or can it echo multiple characters?
It deals with a single character (8-bit ASCII byte) at a time. In slide 31 of lecture 9 the character being echo'd is stored in r16 — an 8-bit register, so it can only be a single character. Only at the end of the program does it loop for the next character. This of course means that if flow control is disabled, data will potentially be lost should the program not react fast enough (not a problem here, assuming a 38000 baud serial line vs. a 16 MHz processor).
Submission reference: IN2926
How do you control the USART with polling?
See lecture 9 and echo38k.asm on Moodle/raptor.
Submission reference: IN2906
In the up_counter assembly code example what do these two lines of code do?
ld r24, Y+0
ld r25, Y+1
These are examples of load indirect with displacement. The first loads the 8-bit word at the 16-bit SRAM address pointed to by Y+0 (i.e. Y) into register r24; the second similarly for the 16-bit SRAM address pointed to by Y+1 (i.e. the next byte) into register r25. The range of displacements and what can be used as the base 16-bit address (e.g. "Y") are limited, but enough to be useful (in cases like this).
Submission reference: IN2904
I was looking at the variable brightness LED assembly code, you first of all have both the brightness and the accumulator value are set to 0, so when this first goes round 255*255 times will the LED ever turn on because it will never overflow?
Correct — it is completely "off" in this case.
Submission reference: IN2899
What is the the PIN register?
For a particular I/O port on the AVR, this is the register that holds the actual values of signals at the pin. E.g. for an input port, this is where you read whether the wire is high (1 or Vdd) or low (0 or Vss). For an output port it generally reflects the value you're driving onto the pin.
Submission reference: IN2900
Will specific knowledge of the Arduino or assembly programmed be needed for the exam?
Yes, but more general knowledge about architecture and assembly programming. I'm in the process of preparing some "mock" questions on the new architecture content.
Submission reference: IN2898
What is EEPROM used for?
For the AVR, persistent non-volatile storage (e.g. configuration data for a device).
Keywords: avr
Submission reference: IN2889
On slide 11 of the lecture "AVR & Assembly Programming", what do you mean when you say that the instruction can't be encoded?
I thought the SRAM just contained data+registers for the instruction to use; why would the instruction be encoded onto it?
And what's X, Y and Z?
For context, the slide (talking about SRAM access) states: "need 16-bit (or at least 12-bit) addresses — not enough room to encode in instructions.". The issue here is that instructions themselves (e.g. load or store) cannot refer to SRAM addresses directly — there isn't enough room in a 16-bit instruction word to encode a 16-bit (or 12-bit) address (plus whether the instruction is a load or store and the target or source register).
SRAM just contains data — no registers, although the contents of the register file are accessible at SRAM addresses 0-31, this is a convenience for programming: when code accesses these locations, no real SRAM activity takes place (because the actual 2 kilobyte SRAM is mapped at addresses 0x100 to 0x8ff). However, there is nothing about encoding instructions onto it (that doesn't make technical sense), the issue as stated is how to represent the possible addressable locations (0x000 to 0x8ff) in a read or write (or other) instruction to be able to access this memory from the program.
The X, Y and Z registers are just particular names for pairs of 8-bit registers, that are used to provide 16-bit addresses. The main use being to access SRAM. I.e. you load a 16-bit address in two halves into the appropriate X, Y or Z register, then say to the CPU "load from address in X". That way the instruction only has to encode whether the address is in the X, Y or Z registers, not the actual address itself. Reading and understanding the various assembler examples (including those from the practical session) will help to put some of these aspects in context.
Keywords: avr , architecture
Submission reference: IN2766
From the lab, how does the computer decide which LED to turn on? I was unsure of how the computer says that it wants to turn on red but not turn on yellow and green as they are all connected to the same circuit.
Labeling the AVR as a "computer" sounds a little odd! (micro-controller would be a more appropriate noun here). But to answer your question, there are essentially three circuits (electronically) when the 3 LEDs are connected — each starts with +5v (Vcc) passes through a resistor (360-ohm) then one of the LEDs, and finishes at one of the AVR's I/O pins. The way things are wired up in the practical labs, these are the AVR's "PORTB" pins 5, 4 and 3. On the Arduino these are the sockets numbered 13, 12 and 11.
In software, a program can use something like this to turn the LEDs into a particular state:
cbi PORTB, 5 ; PB5 low -> red LED on
sbi PORTB, 4 ; PB4 high -> yellow LED off
sbi PORTB, 3 ; PB3 high -> green LED off
The sbi and cbi instructions set and clear individual bits in I/O registers (the port B port-register in this case, which when configured for output, drives those particular pins high or low).
Keywords: avr , electronics
Submission reference: IN2640
What does the PORT register actually do, and how does it work with PUD and what is the pull up resistor?
The PORT register's operation depends on whether the pins (individually) are configured for input (DDR = 0) or output (DDR = 1). In the case of output ports (where the AVR drives a voltage onto the pin) the PORT register value controls whether the port is driven high (PORT = 1) to +5v, or low (PORT = 0) to ground. In the case of input ports (where DDR = 0), the PORT setting controls the use of the internal pull-up resistor. If set to 0, the internal pull-up is disabled and the pin is high-impedance (acts like it's not connected to anything, more or less, so won't create strange electrical effects in an external circuit). If set to 1, the internal pull-up is enabled and the pin is pulled up to +5v through (according to the datasheet) a 20k to 50k-ohm resistor.
My explanation of the pull-up resistor in the slides (and in the lecture) is sufficient for what I expect you to know in CO527, but if you want to find out more, Wikipedia (Pull-up_resistor) has a fairly lengthy description.
Keywords: avr
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Maintained by Fred Barnes, last modified Wed May 25 15:07:20 2016 |
