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The Veritas Design Logic; a User''s View
F. K. Hanna and N. Daeche
In Proc. Theorem Provers in Circuit Design, pages 182-196. North Holland, 1992.Bibtex Record
@inproceedings{426, author = {F. K. Hanna and N. Daeche}, title = {The {V}eritas {D}esign {L}ogic; a {U}ser''s {V}iew}, month = {unknown}, year = {1992}, pages = {182-196}, keywords = {determinacy analysis, Craig interpolants}, note = {}, doi = {}, url = {http://www.cs.kent.ac.uk/pubs/1992/426}, booktitle = {Proc. Theorem Provers in Circuit Design}, publisher = {North Holland}, }