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Automatic Verification of Mixed-Level Logic Circuits
Keith Hanna
In O. Gopalakrishna and P. Windley, editors, Formal Methods in Computer-Aided Design, volume 1522 of Lecture Notes in Computer Science, pages 182-196, Proceedings FMCAS 98, December 1998. Springer-Verlag, Berlin.Bibtex Record
@inproceedings{1008,
author = {Keith Hanna},
title = {{Automatic Verification of Mixed-Level Logic Circuits}},
month = {December},
year = {1998},
pages = {182-196},
keywords = {determinacy analysis, Craig interpolants},
note = {},
doi = {},
url = {http://www.cs.kent.ac.uk/pubs/1998/1008},
ISBN = {3-540-65191-8},
ISSN = {3-540-65191-8},
address = {Proceedings FMCAS 98},
booktitle = {Formal Methods in Computer-Aided Design},
editor = {O. Gopalakrishna and P. Windley},
publication_type = {inproceedings},
publisher = {Springer-Verlag, Berlin},
series = {Lecture Notes in Computer Science},
submission_id = {3549_952513544},
volume = {1522},
}